EE 538 Introduction to Digital VLSI Design

Digital CMOS VLSI chip design using Tanner's L-EDIT layout software, and PSPICE. Topics include CMOS gate logic design simulation and layout, speed and power considerations, and CMOS VLSI chip design using Standard Cells. A modest-sized CMOS integrated circuit design project through layout, simulation, and verification is required. A term paper on future trends in digital CMOS VLSI technology is required.